From: Thomas Walker Lynch Date: Fri, 10 Jul 2026 15:04:30 +0000 (+0000) Subject: . X-Git-Url: https://git.reasoningtechnology.com/with_x_variable.png?a=commitdiff_plain;h=63d56a550652a311505722563e1667a119d98514;p=TM-2026 . --- diff --git a/document/TM-2026.html b/document/TM-2026.html index 0ef5f0b..6859928 100644 --- a/document/TM-2026.html +++ b/document/TM-2026.html @@ -1762,128 +1762,155 @@

Unary Representation address

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We can define a Turing Machine that is identical to the recursive definition of Natural Numbers as given by Peano. Giuseppe Peano, Arithmetices principia, nova methodo exposita (Turin: Fratres Bocca, 1889).

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If we were to run the Natural Numbers Machine and watch as it writes to the tape, we would watch as the Natural Numbers are printed one after another, '·s·ss·sss·ssss· ...'. As the Natural Numbers Machine never halts, we cannot use the Natural Number Machine to initialize a tape, but we can analyze the machine. When the leftmost cell holds a terminator, we say it has the value 'zero'. We call '·s·' the number 'one'. Each set of 's' adjacent symbols surrounded by the terminators, and zero, is said to be a Natural Number. +

+ An architect can define a Turing Machine that is identical to the recursive definition of Natural Numbers as given by Peano. Giuseppe Peano, Arithmetices principia, nova methodo exposita (Turin: Fratres Bocca, 1889). If a person were to run the Natural Number Machine and observe as it writes to the tape, that person would watch as the Natural Numbers are printed one after another: '·s·ss·sss·ssss· ...'. Because the Natural Number Machine never halts, a person cannot use the Natural Number Machine to initialize a tape, but a person can analyze the machine. When the leftmost cell holds a terminator, it is said to have the value 'zero'. A person calls 's·' the number 'one', and so forth.

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To say that one Natural Number A is smaller than Natural Number B is to say that A would occur on the Natural Number Machine tape to the left of B, if the machine were to be run. Similarly, if B were said to be greater than A, that would mean B would occur further to the right. To increment a Natural Number is to find its right neighbor. To decrement a number is to find its left neighbor. +

+ A function extension version of the Natural Number sequence generator would accept as input a prior function extension result, or an initial empty tape, and then modify the tape to contain the next count. This is accomplished through two subroutine calls: find_empty and increment. The find_empty machine checks the symbol under the head. Upon finding it is not the empty symbol, the machine steps right and checks the next cell, repeating until it finds the empty symbol, whereupon it halts. The increment machine writes an 's' onto the tape and halts. Recurrent calls to the Natural Number extender then produce a sequence of result tapes: [], [s], [ss], …. Similarly, a programmer can write a machine called decrement, though a person must note that decrementing can return the left of leftmost symbol.

- Now suppose we have a single Natural Number on a tape, say 'sss·', then we can define an Increment machine that, when initialized with a tape, writes an additional 's' and a new terminator. For example, when initialized with 'sss·' and then run, it produces 'ssss·'. In an analogous manner, we can define a Decrement machine. + To say that Natural Number A is smaller than Natural Number B is to say that A would occur on the Natural Number Machine tape to the left of B, if the machine were run. Similarly, if B were said to be greater than A, that means B would occur further to the right. It is a simple matter for a programmer to write decider machines for this. The decider is given two input tapes for the two numbers to compare, and it keeps a head on each. It then steps forward until both heads do not have an 's' under them. If empty symbols are found simultaneously on both tapes, then the two numbers are equal; otherwise, the number with an empty symbol under the head is the lesser number.

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As such, we can assign a Natural Number to each member of the tape sequence through the following procedure. Given a machine, say P, we lock to it a second Address Machine, say A_P. When P's tape is first mounted, at the same time A_P is mounted with a tape that has only a terminator symbol, '·'. When P steps right, A_P writes an 's', steps right, and writes the terminator. For each step left of P, the machine A_P steps left and writes the terminator symbol. +

+ As such, a person can assign a Natural Number to each cell of a given tape by using a mechanical procedure. Given a machine, say P, and an address machine, say A_P, each time P is stepped right, a call is made to run increment on A_P. Similarly, each time P is stepped left, a call is made to run decrement on A_P. In this manner the tape on A_P will always hold the address that machine P's head is on.

- The Natural Number found on A_P is then called the address of the cell the head is on for machine P. As each increment and decrement of the address is a constant time operation, keeping the address of the cell the head is on is a computationally inconsequential action. + The Natural Number found on A_P is then called the address for the cell that machine P's head is on. As each increment and decrement of the address is a constant time operation, keeping the address of the cell the head is on is computationally inconsequential.

- An address space is the set of addresses that would be placed into correspondence to cells if we were to step across all those cells while assigning an address to each cell the head is on. + An address space is a set of addresses for contiguous cells. The tape's address space is the set of addresses for all the cells on the tape. Typically the address of 0 is given to the leftmost among the contiguous cells.

+

Binary Arabic Representation address

- To rigorously analyze the time complexity of keeping an address, we can trace the exact tape head movements required to increment a binary counter. We write the binary numbers left to right, placing the least significant bit on the left. In this arrangement, flipping k bits requires writing a zero, stepping right, and repeating until writing a one. The total forward tape actions for an increment requiring k bit flips is exactly 2k - 1. + Would it be computationally consequential for the assignment of addresses to cells if instead of using unary for addresses, a person used binary Arabic Representation? For unary representation each increment was constant time, but with Arabic addresses, increments will have a carry. Therefore, there is reason to suspect that the necessity to call an address increment when stepping probably causes steps to become ever slower. +

+ +

+ If an architect allows the Arabic count to be multiprecision, and thus grow as the count gets larger, the empty symbol becomes a terminator. If the architect instead fixes the width of the Arabic number, then the width must be hardcoded and handled as an end case, which muddies the discussion without changing the computational complexity results. Hence, this model opts for the expanding representation. +

+ +

+ For Arabic_increment, the machine reads the cell under the head, upon finding a 0 it writes a 1 and halts. Upon finding a 1, it writes a 0, steps right, and repeats the procedure.

+ + increment: + a = TTU.read() + if a == 0 or a == ⊔: + TTU.write(1) + halt + TTU.write(0) + TTU.step() + goto increment + + +

Here TTU is the tape transport unit. It has the number to be incremented mounted on it. This number is either zero, which would mean the leftmost cell is empty, or it is of the same form as a result from a Natural Number extension machine. A TTU.read occurs into the read buffer automatically when the machine enters a new state on the programmed controller, so it is not counted as a step. Actions are associated with the state of the programmed controller, so when the machine arrives at a write, step, or halt node, the machine has taken a step. Sequential instructions mean unconditional next state choices, whereas an 'if' signals a conditional next state choice. The condition is a logical proposition based on the read symbol.

+ +

The loop form here is worth taking note of, as it will come up again. The controller executes a first action, that of a read, followed by a middle break test, and then the recursive form actions.

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- The following table details the sequence of increments to count from zero to seven. This demonstrates the required tape actions to complete an entire cycle from zero to 2^n - 1 for an n=3 bit counter: + Each row shows an input tape, and actions taken to write the result tape. For any given row, the result tape is the same as the input tape on the next row down. The table lists 7 increments, which is sufficient to reach the maximum count that can be held by a 3 bit counter.

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ValueTape (LSB left)Increment actionsCost (steps)inputactioncost (steps)
0000write 11write 1, halt (result is maximum 1 bit count)2
1100write 0, step right, write 131 write 0, step, write 1, halt4
01write 1, halt (result is maximum 2 bit count) 2010write 11
3110write 0, step right, write 0, step right, write 1511write 0, step, write 0, step, write 1, halt6
4 001write 11write 1, halt2
5 101write 0, step right, write 13write 0, step right, write 1, halt4
6 011write 11write 1, halt (result is maximum 3 bit count)2
7 111(Cycle complete)-

- For an n bit counter, the sequence of costs follows a pattern. Half of the increments flip one bit, a quarter flip two bits, an eighth flip three bits, and so forth. The total number of forward tape operations to perform the entire sequence of 2^n - 1 increments is given by the summation: + The number of programmable controller state transition steps required to reach a maximum 1 bit, 2 bit, and 3 bit count are: [2, 8, 22]. Note these are cumulative. The three bit maximum count cost includes that of the two bit maximum count cost, etc. Each cycle becomes exponentially longer, so a better measure is the average cost to reach each maximum count: [2/1, 8/3, 22/7] = [2, 2.667, 3.143] +

+ +

+ For an n bit counter, the sequence of costs follows a pattern. Half of the increments evaluate one bit (costing 2 steps), a quarter evaluate two bits (costing 4 steps), an eighth evaluate three bits (costing 6 steps), and so forth, over the 2^n - 1 increments required to reach the maximum n bit count:

- \sum_{k=1}^{n} (2k - 1) 2^{n-k} = 3 \cdot 2^n - 2n - 3 + \sum_{k=1}^{n} 2k \cdot 2^{n-k} = 2^{n+2} - 2n - 4

- To find the average cost per increment across this entire cycle, we divide the total number of tape actions by the total number of increments, which is 2^n - 1. For asymptotic analysis, dividing by 2^n reveals the limits cleanly: + To find the average cost per increment across this entire progression, a person divides the total number of tape actions by the total number of increments, which is 2^n - 1. For asymptotic analysis, dividing by 2^n reveals the limits cleanly:

- \text{Average Cost} = \frac{3 \cdot 2^n - 2n - 3}{2^n} + \text{Average Cost} \approx \frac{2^{n+2} - 2n - 4}{2^n}

- Which simplifies algebraically to: + This simplifies algebraically to:

- \text{Average Cost} = 3 - \frac{2n}{2^n} - \frac{3}{2^n} + \text{Average Cost} = 4 - \frac{2n}{2^n} - \frac{4}{2^n}

- As the address space grows, the bit width n increases. The polynomial term 2n is outpaced by the exponential denominator 2^n, causing the fractional terms to converge to zero. The average work done by the machine head converges to exactly three tape actions per increment. + As the address space grows, the bit width n increases. The polynomial term 2n is outpaced by the exponential denominator 2^n, causing the fractional terms to converge to zero. The average work done by the machine head converges to exactly four tape actions per increment. This is a surprising counter intuitive result.

- Consequently, maintaining an Arabic address on a secondary Address Machine remains a constant time operation in the amortized sense, making it computationally inconsequential to the complexity class of the base machine. However, if a problem were to increment and decrement repeatedly around a binary power count, the behavior would be the limiting log time due to the length of the counter. An unlucky situation like this is called aliasing. We would not see this aliasing case on modern machines, because entire pointer width operations are done in a single operation, no matter which carry case. In small geometries where computation element delay dominates, adders of fixed width tend towards log time computation, which makes it practical to perform word width addition operations atomically and typically in a few machine cycles. + Consequently, maintaining an Arabic address on a secondary Address Machine remains a constant time operation in the amortized sense, making it computationally inconsequential to the complexity class of the base machine. However, if a problem were to increment and decrement repeatedly around a binary power count, the behavior would be the limiting logarithmic time due to the length of the counter. An unlucky situation like this is called aliasing.

- The model used here to define an address is analogous to keeping a pointer into memory, and then using that pointer value as the address. Each step then increments or decrements the pointer. On a real machine, to access memory requires sending that pointer on a trip through a virtual memory system perhaps, and then through an address decoder. In the Turing Machine model, the head directly indicates a location, so it is more akin to the output of the memory decoder, though unlike the output of a memory decoder, it is stateful, i.e., a persistent value that can be moved incrementally. The analogy with the Turing Machine model holds due to the fiction of a constant decode time, as described in the prior paragraph. + The model used here to define an address is analogous to keeping a pointer into memory, and then using that pointer value as the address. Each step then increments or decrements the pointer. A pointer will be one word in width. In small geometries where computation element delay dominates, two operand adders of fixed width tend towards logarithmic complexity evaluation times against bit width, which makes it practical to perform word width addition operations atomically in one machine cycle. In fact, for some machines, the adder time likely sets the clock period. Consequently, a programmer cannot expose increment time aliasing to the real world. It remains a theoretical observation. +

+ +

+ On real machines, there is no head sitting on top of system memory that gets pushed back and forth. Instead, pointers are sent on a trip through a virtual memory system, and then through an address decoder. Address decoders resemble carry chains, and they also have logarithmic physical evaluation times as word width grows. Hence, a fixed width word holding an address gets decoded in approximately constant time measured in clock ticks. Address decoding will get spread across the memory hierarchy, so decode time is a complex question.

- At a higher level, that virtual memory system level, the memory architecture begins to look more like that of a Turing Machine. The translation lookaside buffer provides stateful location context, and the neighbor relationship between pages might be taken into account for performance reasons. However, once a program starts performing at virtual memory page fetch times instead of local system memory access times, we say that it is page thrashing and know it will become too slow to wait on, no matter its computation complexity class. Aliasing can happen in the virtual memory system, which, when it happens, can cause programs to become very slow. + At a higher level, that virtual memory system level, the memory architecture begins to look more like that of a Turing Machine. The translation lookaside buffer provides stateful location context, and the neighbor relationship between pages is sometimes taken into account for performance reasons. However, once a program starts performing at virtual memory page fetch times instead of local system memory access times, a person recognizes it as page thrashing and knows it becomes too slow to wait on, no matter its computation complexity class. Aliasing can happen in the virtual memory system, which, when it happens, can cause programs to become very slow. +

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So in summary then, using Arabic Representation for addressing is not statistically computationally consequential. However, the idea of using a decoded address in place of a tape head raises issues. It would not be an exaggeration to say that the goal of modern computer architecture is to ensure that within the locality of an execution context, address decoding does not become computationally consequential.

Area and partitioning @@ -3216,4 +3243,10 @@

This reveals a strict recurrent structure. To generate component k of the reciprocal vector, the generator machine relies entirely on the static components of the input polynomial A_0 and the previously computed components of the reciprocal C_{0, 0} through C_{0, k-1}. By encapsulating this recurrence within a generator, a programmer can perform exact division while maintaining finite memory bounds, extending the reciprocal vector only when the execution demands it. Note, this is a reciprocal of a function, rather than that of a value.

+ + + ---------- + + in the original Turing machine Architecture, add three tapes, stdin, stdout, and stderr + -->