From: Thomas Walker Lynch Date: Wed, 29 Jul 2026 07:17:44 +0000 (+0000) Subject: TTCA architecture set, seems X-Git-Url: https://git.reasoningtechnology.com/%27%20%20%20full_path%20%20%20%27?a=commitdiff_plain;h=99e824921860d608e4292ceb90bc7f28f99e5690;p=TM-2026 TTCA architecture set, seems --- diff --git a/document/book/TM-2026.html b/document/book/TM-2026.html index 10bf366..e6686d3 100644 --- a/document/book/TM-2026.html +++ b/document/book/TM-2026.html @@ -600,7 +600,7 @@

For machine B, no modifications are required to the native read and write functions.

-

It is possible to build a mapping between the machine A and machine B. The read and write operations are placed into correspondence. The empty set as a member of tape sequence of machine A is placed into correspondence with the empty symbol of machine B. The other components are defined identically, and map directly. This creates an isomorphism between the two machines. Hence, they are equally expressive. However, machine B is simpler, so it is understandable that computer theoreticians have settled on this definition.

+

It is possible to build a mapping between the machine A and machine B. The read and write operations are placed into correspondence. The empty set as a member of tape sequence of machine A is placed into correspondence with the empty symbol of machine B. The other components are defined identically, and map directly. This establishes an isomorphism between the two machines. Hence, they are equally expressive. However, machine B is simpler, so it is understandable that computer theoreticians have settled on this definition.

If we view the empty symbol from within the definition of machine B, it is a category error. It is a sequence element rather than a container. Even if it were allowed that a position within a sequence were a container and thus could have the property of being empty, the symbol represents that there is no symbol in the very location it is found. Hence, to ascribe an appropriate meaning to the empty symbol, the entire system must be kept including the mapping to machine A, then the empty symbol found on machine B means that if machine A were used instead, the same location in the tape sequence would be an empty set. However, this feels unsatisfactory, because in all other respects, machine B is a perfectly well defined Turing Machine all by itself.

@@ -1336,7 +1336,7 @@

The head argument multiplexes the instruction to the specified head. If the TTU has one head, the head argument is optional. The last two instructions cause the tape to be moved such that, relatively, the selected head moves left or right by one cell.

-

The customer programmed control unit, CPCU

+

The customer programmed control unit, CPCU

The controller is programmed via patch panels. The panels would look something like what is shown in the following ASCII art blocks. Note that ● indicates an illuminated indicator light, whereas ○ is not illuminated. [/] represents an open toggle switch, while [—] is a closed one. {*} is a pushed button, while { } is a button that is not pushed. ( ) represents a hole for a banana plug. Each patch cord has a banana plug on each end. Plugging a patch cord between separate panels will void the warranty ;-).

@@ -1479,19 +1479,19 @@

Description of a read('s') instruction

-

The current state register, q, samples and holds on the rising edge of the clock. This then provides a stable state signal to the control panel for an entire cycle. The status register, s, is the phase inverse; it samples on the falling edge of the clock and holds for an entire cycle.

+

The current state register, q, samples and holds on the rising edge of the clock. This then provides a stable state signal to the control panel next state matrix columns for an entire cycle. The status register, s, is the phase inverse; when enabled it samples on the falling edge of the clock and holds for an entire cycle.

-

On the rising edge of the clock, the new current state signal ripples through the Action Table. As the q register is stored as a one-hot value, this happens very quickly. Rather than placing instructions in the Action Table, the decoded values of the instructions with the control signals that are needed are programmed directly into the table. Among the decoded outputs of the action instruction is a control signal that enables the status register to sample when the clock falls.

+

On the rising edge of the clock, the new current state signal ripples through the Action Table. As the q register is stored as a one-hot value, this happens very quickly. Rather than placing instructions in the Action Table, the decoded values to be used as control signals are programmed directly into the table. Among the decoded outputs of the action instruction is a control signal that enables the status register to sample when the clock falls.

A control signal from the decoded instruction coming from the Action Table then enables the selected TTU and provides it with its decoded instruction. Part of the decode will be the HU select line, and a signal to tell the HU status register to drive the machine's internal data bus.

Thus the status register in the selected TTU and HU will be driving the data bus, and the machine s register is ready to sample the bus. Then the clock falls, the s register updates, and holds its value until the next time when it is enabled to update and the clock falls.

-

The updated value in the s register then drives the Next State Table rows. The column lines stabilized earlier in the cycle, immediately after the state updated. If a patch cord is plugged in at the intersection of the row and the column, then a signal will travel through that cord to the next state input sub-panel that is located below the state and status matrix. Then when the clock rises again, this signal, which is held steady by the driving status register, will be sampled and become the next state.

+

The updated value in the s register then drives the Next State Table rows. The column lines stabilized earlier in the cycle, immediately after the state updated. If a patch cord is plugged in at the intersection of the row and the column, then a signal will travel through that cord to the next state row that is located below the state and status matrix. Then when the clock rises again, this signal, which is held steady by the driving status register, will be sampled and become the next state.

Then the clock rises, and the cycle repeats, though perhaps while selecting a different row from the action table, and thus performing a different instruction.

-

It has been common in real machine design that instead of using one clock and controlling its duty cycle, that two phase separated clocks are used. Then all registers can sample on the rising (or falling edge), and the separation between the phases can be adjusted to optimize the timing. With this approach any number of phrase separated clocks could be introduced. It is also possible that a single clock could be used, where the new state drives the loop and the s register stands to the side, also sampling on rising edge only so that it can later drive the bus in a later write command.

+

In physical machine design, rather than triggering logic on both edges of a single clock and managing strict duty cycle constraints, designers often deploy two clocks separated by a 180-degree phase shift. This configuration, known as two-phase clocking, allows all registers to sample uniformly on a rising edge (or all on a falling edge) while permitting designers to adjust the phase separation to optimize timing margins. This approach can be used to accommodate any number of phase separated clocks. Alternatively, a single-edge-triggered clock can drive the entire control loop. In this design, the current state propagates through the action table, selects the driving status register in the TTU, passes through the status decoder, and resolves at the next-state matrix. Because the s and d registers are wired as appendages to this primary loop and also sample on the rising edge, the system must enforce strict hold-time requirements. This guarantees the registers capture the established state rather than the transient values newly propagating across the bus. Clocking designs that successfully maintain these operational margins across the extremes of manufacturing tolerances and thermal ranges are said to be clean.

The TTCA stored program @@ -1753,62 +1753,6 @@

An example of a non-Turing tape like model is the Emacs vertical line cursor model, where a cursor is said to be between characters. An ASCII file offers no such feature as 'in between' characters. Like a Turing Machine tape, a medial character in an ASCII file has a left neighbor and a right neighbor character. Any attempt to represent an in between cursor within the file itself would require inserting more characters into the file under the same model of every medial character having a left and a right character. Consequently, though emacs presents a model where cursor is located in between two characters, this model is only due to the interpretation of the functions' actual effects presented to users in the documentation. For example, instead of saying a cursor is located upon a character, and that inserting a character inserts the character to the right of the given character, the manual gives the description that the new character is inserted at the cursor location, where said cursor is in between the given character and its right neighbor. Thus the documentation presents the user with one model, which by necessity of using standard library calls to work with files, is built upon another model.

- - Or, does it go the other way? Computational Naturalism - -

- Given that we have an architectural definition for a Turing Machine, and will modify this in a later chapter to define a realizable Turing Complete architecture, it is possible to invert the foundation of mathematics. Instead of mathematics preceding computation, we posit that given a Turing Machine exists, all of mathematics is an interpretation of what can be done with it. -

- -

- We begin by defining the tape cell as a location in a physical memory, which provides us with arrays of charge configurations. -

- -

- We then define the symbol in computational terms, as done in the prior section. This begins with memory addresses, represented as charge arrays, acting as primitive symbols, and extends to the symbol factory, copy operations, and instance comparison. -

- -

- Logic is then defined on top of relay switch logic, as Shannon and others have already done. A machine that requires all inputs to be the '1' symbol to produce a '1' symbol output is a conjunction machine, and so forth. -

- -

- On top of this we can define the Peano Machine, a counter, and then use that machine as the definition of Natural Numbers. -

- -

- Where Gödel reduced logic to natural numbers, we go the other direction to expand upon logic from natural numbers. -

- -

- An axiomatic proof is then a decider that is built up from subroutine calls to the axioms. We might then quantify over all possible compositions of our subroutines in analysis and ask if it is possible that a contradiction decider would return Y or N. -

- -

- Frege's set theory is then the analysis of a logic program against an enumeration of inputs to choose if a proposed symbol is in a set. Perhaps executing such a program is left to first order analysis, or perhaps execution is not practical, and evaluation is left to second order analysis. -

- -

- Russell's Paradox will then be expressed as a Turing Machine that can be analyzed in the second order, but cannot be analyzed in the first order. That is, the paradox exists merely in the first order as it will never halt when run. However, it is not a paradox in the second order. It is, of course, through second order analysis that we are able to describe why Russell's Set description does not resolve in the first order. -

- -

- With the language of Computational Naturalism it is possible to restate every statement ever made by any mathematician; we might say that the mere fact that a mathematician was able to state something qualifies its membership into Zermelo's S set. -

- -

- Given our knowledge that a universal halting problem analyzer that decides if a Turing Machine program halts does not exist, it is desirable to have rules that guide our writing only Turing Machine programs that are known to halt. This can be done through construction, as proposed by Russell, or through axioms of separation, mapping, and choice, as proposed by Zermelo and others. But then we know from the completeness and correctness theorems, that when such guiding rules are applied, there will exist Turing Machine programs that do halt, but whose definition cannot be constructed, nor surmised using the said axioms. -

- -

- This brings us back to the reference from the Zermelo discussion in the introduction. Specifically, the question posed is if our finding through second order analysis that Russell's paradoxical set formulation will not run in the first order and define a set, does this mean that we are merely using S to state that we are tossing out sets that cannot be defined? The answer is it is not quite this simple. Had Frege said, 'we merely dismiss such sets', we would not have the formalization for the second order analysis. Throwing out Russell's paradox simply because we ran it and it never halted is not a practical approach. Instead, we omit it specifically from S because analyzing R reveals that it fails to define a first order halting machine, and S, by definition, only holds first order halting machines. Zermelo's language is precise and formal. However, it is this bothersome nuance, now articulated here, which caused us to scratch our heads when reading Zermelo the first time. -

- -

- Russell's set formulation, R, can be analyzed to determine that it would not halt if it were run. We still keep it as a second order object, and have even given it a name, R. However, this begs the question, are there machines that cannot even be analyzed in the second order to ascertain if they would return a result in first order analysis, i.e., when they are run? If Gödel has a say here, a person would wager that such machines exist. But then, is there an option for analysis in the third order? Is Turing's halting proof a third order analysis as it reasons about running the second order analyzer? Or is it merely a recursive application of second order analysis? -

- - Computational Analysis @@ -4084,6 +4028,62 @@ Now suppose defining a Turing Machine that initially has the head on the leftmos This continuous tension between pure formal models and practical execution speed remains a defining characteristic of the field, driving the structural logic behind modern mechanisms dealing with instruction pipelines, branch prediction, and memory aliasing.

+ + Or, does it go the other way? Computational Naturalism + +

+ Given that we have an architectural definition for a Turing Machine, and will modify this in a later chapter to define a realizable Turing Complete architecture, it is possible to invert the foundation of mathematics. Instead of mathematics preceding computation, we posit that given a Turing Machine exists, all of mathematics is an interpretation of what can be done with it. +

+ +

+ We begin by defining the tape cell as a location in a physical memory, which provides us with arrays of charge configurations. +

+ +

+ We then define the symbol in computational terms, as done in the prior section. This begins with memory addresses, represented as charge arrays, acting as primitive symbols, and extends to the symbol factory, copy operations, and instance comparison. +

+ +

+ Logic is then defined on top of relay switch logic, as Shannon and others have already done. A machine that requires all inputs to be the '1' symbol to produce a '1' symbol output is a conjunction machine, and so forth. +

+ +

+ On top of this we can define the Peano Machine, a counter, and then use that machine as the definition of Natural Numbers. +

+ +

+ Where Gödel reduced logic to natural numbers, we go the other direction to expand upon logic from natural numbers. +

+ +

+ An axiomatic proof is then a decider that is built up from subroutine calls to the axioms. We might then quantify over all possible compositions of our subroutines in analysis and ask if it is possible that a contradiction decider would return Y or N. +

+ +

+ Frege's set theory is then the analysis of a logic program against an enumeration of inputs to choose if a proposed symbol is in a set. Perhaps executing such a program is left to first order analysis, or perhaps execution is not practical, and evaluation is left to second order analysis. +

+ +

+ Russell's Paradox will then be expressed as a Turing Machine that can be analyzed in the second order, but cannot be analyzed in the first order. That is, the paradox exists merely in the first order as it will never halt when run. However, it is not a paradox in the second order. It is, of course, through second order analysis that we are able to describe why Russell's Set description does not resolve in the first order. +

+ +

+ With the language of Computational Naturalism it is possible to restate every statement ever made by any mathematician; we might say that the mere fact that a mathematician was able to state something qualifies its membership into Zermelo's S set. +

+ +

+ Given our knowledge that a universal halting problem analyzer that decides if a Turing Machine program halts does not exist, it is desirable to have rules that guide our writing only Turing Machine programs that are known to halt. This can be done through construction, as proposed by Russell, or through axioms of separation, mapping, and choice, as proposed by Zermelo and others. But then we know from the completeness and correctness theorems, that when such guiding rules are applied, there will exist Turing Machine programs that do halt, but whose definition cannot be constructed, nor surmised using the said axioms. +

+ +

+ This brings us back to the reference from the Zermelo discussion in the introduction. Specifically, the question posed is if our finding through second order analysis that Russell's paradoxical set formulation will not run in the first order and define a set, does this mean that we are merely using S to state that we are tossing out sets that cannot be defined? The answer is it is not quite this simple. Had Frege said, 'we merely dismiss such sets', we would not have the formalization for the second order analysis. Throwing out Russell's paradox simply because we ran it and it never halted is not a practical approach. Instead, we omit it specifically from S because analyzing R reveals that it fails to define a first order halting machine, and S, by definition, only holds first order halting machines. Zermelo's language is precise and formal. However, it is this bothersome nuance, now articulated here, which caused us to scratch our heads when reading Zermelo the first time. +

+ +

+ Russell's set formulation, R, can be analyzed to determine that it would not halt if it were run. We still keep it as a second order object, and have even given it a name, R. However, this begs the question, are there machines that cannot even be analyzed in the second order to ascertain if they would return a result in first order analysis, i.e., when they are run? If Gödel has a say here, a person would wager that such machines exist. But then, is there an option for analysis in the third order? Is Turing's halting proof a third order analysis as it reasons about running the second order analyzer? Or is it merely a recursive application of second order analysis? +

+ + Appendix: Stirling Numbers @@ -4269,3 +4269,5 @@ Now suppose defining a Turing Machine that initially has the head on the leftmos --> + +